The present invention generally relates to the design of integrated circuit devices and, more particularly, to the distribution of power to a multi-chip module integrated circuit device.
The power demand for multi-chip module (xe2x80x9cMCMxe2x80x9d) technology integrated circuits (xe2x80x9cICxe2x80x9d) is rapidly increasing due to aggressive circuit miniaturization measures. Integrated circuit chip performance and power density are increasing, in part, by increasing the quantity of logic gates within a given integrated circuit chip surface area. New high-density thin-film interconnection technology allows increased IC chip density, and thus greater quantities of ICs on an MCM. Constructing MCMs using a greater density, thus greater quantity, of ICs, each using more and more power, is rapidly driving up MCM power density and total MCM power requirements.
Higher density often means less physical separation between components. Less physical separation in turn, reduces available dielectric insulation. Less available dielectric insulation favors circuit operation at lower voltages. Lowering operating voltages necessitates higher current magnitudes to supply equivalent power loads. All else being equal, heating (IR) losses increase as power is distributed at lower voltages and higher currents. Increasing MCM power loads while simultaneously reducing MCM operating voltage levels drives required current magnitudes even higher.
Efforts to further enhance IC performance also include use of higher clock frequencies to increase the quantity of operations performed per unit time. Operation at higher frequencies requires additional energy to charge a greater parasitic capacitance (capacitive impedance is a function of frequency). Finally, an MCM having higher power density and increased total power requirements is subject to elevated localized operating temperatures which can increase semiconductor resistance, in turn resulting in further heating (IR) losses that must be powered.
The need to transmit greater magnitudes of current at a given (constant) voltage level, generally mandates using a larger conductor to accommodate greater current-carrying capacity within thermal limits. In MCM applications, where xe2x80x9creal estatexe2x80x9d is valuable, increasing conductor physical size, and/or the quantity of conductors, is a significant engineering cost consideration. Other design concerns accompany larger current magnitudes as well, including greater inductive losses and more generation of L(di/dt) switching noise.
Further complicating matters, MCM designers may wish to integrate a heterogeneous variety of integrated circuit and discrete component technologies into a single application. Differing technologies often require power supplies at their own unique voltage level. Supplying an MCM with a plurality of power supply voltages increases MCM internal and external circuit complexity. Additionally, each isolated power supply voltage level requires valuable MCM surface area termination space.
A multi-chip module (MCM) device and method for making a MCM are provided. The MCM includes a substrate having a first and a second surface, and a stepped-edge surface. A high-density thin-film circuit region is disposed on the first surface. Signal pins are disposed on the second surface. Power pins are disposed on the stepped-edge surface. A multi-layer interconnect arrangement is disposed between first and second surfaces, coupling circuitry in the high-density thin-film circuit region to the signal and power pins. A plurality of integrated circuit chips are disposed on the high-density thin-film circuit region. Each of the integrated circuit chips has a plurality of signal terminals and power terminals. The signal terminals and power terminals coupled to circuitry in the high-density thin-film circuit region. A first plurality of voltage converters is disposed on the first substrate surface outside the high-density thin-film circuit region. The voltage converters are discrete components. Each voltage converter has a plurality of power input terminals and power output terminals coupled to the multi-layer interconnect arrangement, electrically located between the power pins and the high-density thin-fihn circuit region. The voltage converters convert an input voltage and an input current to a relatively lower output voltage and a relatively higher output current. On-board voltage conversion permits the MCM to receive power at higher voltage than is supported by the high-density thin-film circuit region. Receiving power at a higher voltage reduces power supply current magnitudes. Therefore, the MCM requires fewer and smaller power pins, and less substrate surface area dedicated to accommodate power pins.
A second plurality of voltage converters is disposed on the second substrate surface in substantial alignment with the high-density thin-film circuit region. Optionally, the portion of second substrate surface in substantial alignment with the high-density thin-film region is recessed. The multi-layer interconnect arrangement has at least one power plane layer and a complimentary ground plane layer. Each power plane layer has an interior portion substantially aligned with the high-density thin-film circuit region. The power plane layer also has a peripheral portion. The high-density thin-film circuit region draws power from the interior portion of a power plane. The first plurality of voltage converters supply power to the peripheral portion of the power planes and the second plurality of voltage converters supply power to the interior portion of the power planes, thus contributing to more uniform power distribution across the power planes.
A method of making an MCM of the present invention is provided. A substrate having a first and a second surface is formed with a multi-layer interconnect arrangement disposed therebetween. A high-density thin-film circuit region is formed and coupled to the multi-layer interconnect arrangement. A plurality of integrated circuit chips are disposed on and coupled to circuitry in the high-density thin-film circuit region. The substrate having power pins, signal pins, the multi-layer interconnect arrangement, and the high-density thin-film circuit region form an MCM subassembly. Optionally, the MCM subassembly also includes the integrated circuit chips. Operability of the MCM subassembly is tested. Operability of the integrated circuit chips and plurality of voltage converters is tested prior to mounting each to the MCM. Subsequent to MCM subassembly testing, the plurality of voltage converters is mounted to the MCM subassembly and electrically coupled to the multi-layer interconnect arrangement.